A major objective of the USB 3.0 specification is to reduce power consumption across all platform implementations. To achieve this, USB 3.0 introduces several architectural and protocol-level improvements.
Effective power savings, however, still depend heavily on the capabilities of the USB 3.0 host controller (see USB 3.0 Host Controllers).
SuperSpeed Bus Power Management
SuperSpeed power management focuses on:
- Aggressively shutting down unused links
- Reducing device function power under software control
These mechanisms significantly lower power usage when devices or links are idle.
Broadcast vs. Unicast Bus
USB 2.0 (Broadcast Bus)
- Ports supply power to all attached devices.
- Packets are broadcast to every device operating at the same speed.
- Each device must decode the packet address to determine whether it is the target.
- Non-target devices still consume power during this process.
SuperSpeed (Unicast Bus)
- Uses unicast communication:
- Only the links along the path between the root port and target device are active.
- All other links can enter electrical idle.
- Results in significant power savings compared to broadcast operation.
Link Power Management
USB distributes 5 V power to all connected devices:
- USB 2.0 current range: 100 mA – 500 mA
- SuperSpeed current range: 150 mA – 900 mA
Basic Power Control
- Both USB 2.0 and SuperSpeed support suspend and resume as a fundamental power-saving mechanism.
SuperSpeed Link States
SuperSpeed adds finer-grained link power states:
| State | Description | Recovery Speed | Notes |
|---|---|---|---|
| U0 | Fully powered and operational | — | Active state; packets flow normally |
| U1 | Standby; electrical idle | Fast (~microseconds) | Quick transitions for short idle periods |
| U2 | Standby; electrical idle | Slow (~milliseconds) | Deeper savings; PLL may be powered down |
| U3 | Suspend; electrical idle | Very slow (~ms to tens of ms) | All functions suspended; bus current ≤ 2.5 mA |
State Transition Diagram
U0 (Active) ←→ U1 (Standby Fast) ←→ U2 (Standby Slow)
↕
U3 (Suspend)
State Control
- Transitions to U1 and U2 may be managed by hardware autonomously (based on inactivity timers)
- Entry into U3 can be initiated only by software
- Link partners negotiate transitions using link commands (LGO_U / LAU / LXU)
Inactivity Timers
- Each device reports its U1/U2 inactivity timeout values in the BOS (Binary Object Store) Descriptor
- The host uses these values to configure hardware-initiated transitions:
bU1DevExitLat— Device exit latency from U1bU2DevExitLat— Device exit latency from U2
- Hardware enters U1/U2 after the configured period of link inactivity
Function Power Management
- Allows individual functions within a device to be suspended independently.
- The link remains active to support other active functions.
- Can also suspend an entire single-function device.
- Activation is software-controlled only.
Function Suspend Mechanism
- Host sends a SET_FEATURE(FUNCTION_SUSPEND) request targeting a specific interface
- The function enters a low-power state
- Other functions in the same device continue operating normally
- The function can optionally enable function remote wakeup
Note
Function-level suspend is particularly useful for composite devices — e.g., a USB headset can suspend its microphone interface while the speaker interface remains active.
System Power Improvements
USB 2.0 Limitation
- USB 2.0 host controllers periodically poll main memory to fetch transfer descriptors.
- Continuous polling prevents:
- Chipsets
- Main memory
- Host processors
from entering low-power states.
USB 3.0 Improvement (xHCI)
- USB 3.0 host controllers access memory more efficiently.
- xHCI does not poll memory for work.
- Instead:
- Software posts work descriptors in memory
- Software notifies the host controller via doorbell registers
- Doorbell registers:
- Identify the device endpoint needing service
- Indirectly specify the memory location of the work
Platform-Level Impact
| Component | USB 2.0 (EHCI) | USB 3.0 (xHCI) |
|---|---|---|
| Host controller | Active (polling memory) | Idle until doorbell ring |
| Main memory | Active (being polled) | Idle until needed |
| CPU | Interrupted by polling overhead | Sleeps until event ring interrupt |
| Chipset/PCH | Active links | Links can enter low power |